Expand description
The hardware abstraction layer (HAL) provides an interface for expensive computations that can be run with hardware acceleration.
The HAL is consumed by the binius_core crate. The interfaces are currently designed around
the architecture of Irreducible’s custom FPGA platform. The
crate exposes a default, portable CPU backend that can be created with
crate::make_portable_backend.
Structs§
- CpuBackend
- Implementation of ComputationBackend for the default Backend that uses the CPU for all computations.
- Round
Evals - Evaluations of a polynomial at a set of evaluation points.
Enums§
- Error
- Sumcheck
Multilinear - An individual multilinear polynomial in a multivariate composite.
Traits§
- Computation
Backend - An abstraction to interface with acceleration hardware to perform computation intensive operations.
- Computation
Backend Ext - HalSlice
- HAL-managed memory containing the result of its operations.
- Sumcheck
Evaluator